Multi-tone RFSoC driver for an AOM: Difference between revisions
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Aarthy mani (talk | contribs) Created page with "'''Team member:''' Mani Aarthy == Objective == Design, implement, and characterise a multi-tone RF synthesiser on an RFSoC platform capable of driving AODs or AOMs used for trapped-ion and neutral-atom qubit control. The synthesiser must support two operating modes on the same hardware: 1) Ion mode --- few tones (1--4) per channel, optimised for phase purity and deterministic inter-tone phase relationships, as required for M{\o}lmer--S{\o}rensen gates. 2) Atom m..." |
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The FPGA prototype serves two purposes: it is a usable instrument in its own right, and it is the architectural and algorithmic testbench for a subsequent \SI{22}{\nano\meter} FDSOI ASIC. | The FPGA prototype serves two purposes: it is a usable instrument in its own right, and it is the architectural and algorithmic testbench for a subsequent \SI{22}{\nano\meter} FDSOI ASIC. | ||
== Introduction == | == Introduction == | ||
Revision as of 05:21, 29 September 2026
Team member: Mani Aarthy
Objective
Design, implement, and characterise a multi-tone RF synthesiser on an RFSoC platform capable of driving AODs or AOMs used for trapped-ion and neutral-atom qubit control.
The synthesiser must support two operating modes on the same hardware:
1) Ion mode --- few tones (1--4) per channel, optimised for phase purity and deterministic inter-tone phase relationships, as required for M{\o}lmer--S{\o}rensen gates.
2) Atom mode --- many tones (32--64) per channel, optimised for intermodulation suppression and linear frequency chirping, as required for tweezer arrays and atom transport.
The FPGA prototype serves two purposes: it is a usable instrument in its own right, and it is the architectural and algorithmic testbench for a subsequent \SI{22}{\nano\meter} FDSOI ASIC.